硅光子集成芯片的耦合策略

目前,硅光子學已迅速成為實現集成光學器件最重要的技術平臺之一,它與標準互補金屬氧化物半導體(CMOS)制造工藝的兼容性使得低成本和大批量制造成為可能,這也使得硅光子學可用來實現數據中心和直接檢測方案中的高比特率收發器。同時,硅光子技術一直處于集成技術的最前沿,廣泛應用于從傳感器到微流體的多種集成器件。

曾經,設計硅光子器件的最大挑戰之一是如何實現高效的模式轉換器,該器件能夠將光纖中的光信號耦合到集成電路中。實際上,由于集成硅波導固有的強雙折射性以及硅波導與單模光纖的光學模式之間存在的大尺寸失配(近800倍),使得硅光子器件的設計特別有挑戰性。

為了克服上述問題,科學界在過去的20年中已經提出了多種解決方案,大體上可分為兩大類:“端射式”和“垂直式”耦合技術。在“端射式”耦合中,由于模斑轉換器的存在,光耦合發生在芯片邊緣平行于芯片表面的方向上;相應地,“垂直式”耦合發生在入射光垂直于芯片表面時,然后利用衍射光柵耦合器重新定向入射光。

上述兩種耦合方式在性能和制造復雜度上各有優劣,并且根據所采用的設計方法以及所選擇的材料和制造技術,又可以分為許多不同的子類別。

由南安普敦大學光電子研究中心Cosimo Lacava博士領導的研究團隊對過去幾年里所發展出的各種解決方案進行了全面總結。根據設計水平和制造復雜度的不同,為讀者提供了70多種結構的詳細分析。

Cosimo Lacava博士認為:“將光從單模光纖耦合入納米光子電路一直是該領域研究的重大挑戰。雖然這個問題看起來很簡單(如何將光耦合入比光纖小800倍的波導而不會損失太多的能量),但其中所涉及的物理問題非常復雜,這激發了科學家們的靈感,開發了許多優秀的解決方案。如果您是一名初級硅光子工程師,或者是正在尋找將光耦合進集成電路方案的學者,本文將為此提供全面的參考,包括實現現代集成器件的大部分常用技術和解決方案。”

該總結首先描述了光耦合機制背后的物理現象;然后分析了目前可用的幾種耦合方案,包括其性能(如耦合效率、帶寬、極化靈敏度和對準公差)以及它們與標準CMOS工藝流程和封裝技術的兼容性。在最后的表格中對各種耦合方案進行了對比,為讀者提供了有用的參考。這項總結工作發表在Photonics Research 2019年第7卷第2期上(Riccardo Marchetti, et al., Coupling strategies for silicon photonics integrated chips)。

該研究團隊相信,該領域未來的工作將聚焦于開發高效的耦合結構。從大規模制造的角度而言,為了實現與CMOS良好的兼容性、減少組裝時間和成本,減少耦合器的插入損耗是十分必要的。

硅光子電路的示意圖。角度拋光和平面拋光光纖陣列分別用于耦合芯片上集成的光柵和邊緣耦合器。圖片上方為光柵的放大示意圖。

Coupling Strategies for Silicon Photonics Integrated Chips

Silicon photonics has rapidly emerged as one of the most prominent technological platforms for the implementation of integrated optical devices. Its compatibility with standard complementary metal-oxide-semiconductor transistor (CMOS) fabrication processes, has enabled low-cost and high-volume manufacturing, making silicon photonics suitable for the implementation of high bit-rate transceivers for data-centre and direct-detection scheme applications. At the same time, silicon photonics technology has been in the forefront for the realization of a number of integrated components for various applications ranging from sensors to microfluidics.

Historically, one of the biggest challenges in designing silicon photonic components, has been related to the realization of high-performance mode converters which can efficiently transfer the light from a standard optical fibre to the integrated circuits. Indeed, this task is particularly challenging due to the strong intrinsic birefringence of integrated silicon waveguides, and to the large size mismatch existing between the optical mode of silicon waveguides and that of single mode fibres (which is almost 800 times larger).

To overcome this issue, the scientific community has proposed different solutions over the last 20 years, which can be schematically divided into two main categories: “end-fire” and “vertical” coupling techniques. In “end-fire” configurations the optical coupling takes place at the edge of the chip in a direction parallel to the chip surface thanks to spot size converters; conversely “vertical” coupling occurs when the incoming beam impinges on the silicon chip almost perpendicularly to its surface and takes advantage of diffractive grating couplers to re-direct the incoming radiations.

Both coupling strategies have different strengths and weaknesses, in terms of performance and ease of fabrication, and can in turn be divided into many different sub-categories, according to the specific design approach employed, and to the chosen materials and fabrication technology.

The group led by Dr. Cosimo Lacava from the Optoelectronics Research Centre, University of Southampton, provides a comprehensive scientific description and view of the various possible solutions that researchers have produced over the last years. They provide the reader with an exhaustive analysis of more than 70 structures reported in the literature, characterized by different level of design and fabrication complexity.

In the review they first describe the physical phenomena underlying the optical coupling mechanism; then they analyze the different coupling solutions available, in terms of their performance (such as coupling efficiency, bandwidth, polarization sensitivity and alignment tolerances) and their compatibility with standard CMOS process flows and packaging techniques. For the benefit of the reader, they benchmark the various coupling solutions against each other in a table at the end, providing the reader with a useful reference, without the need to scan the entire review. This work is published in Photonics Research, Volume 7, Issue 2, 2019 (Riccardo Marchetti, et al., Coupling strategies for silicon photonics integrated chips).

Dr. Cosimo Lacava comments on this work: “The ability to couple a light beam from a SM-fibre to a nanophotonic circuit has always represented a significant challenge for researches working in this field. Although the wording of the problem is simple (How we squeeze the light into a waveguide, which is 800 times smaller than an optical fibre without losing too much energy?), the physics involved is intriguing and technologically complex, and has inspired many scientists who have developed a number of elegant solutions over the years. If you are starting your career as silicon photonic engineer or simply you are looking at the various solutions available to couple the light to your designed integrated circuit, here we provide a comprehensive reference, containing the most common techniques and solutions to accomplish this basic task, vital for the realization of any modern integrated component.”

They believe that future work in the field will be focused on the development of even more efficient coupling structures, where the effort to reduce the couplers insertion loss will have to cope with the necessity to attain full CMOS compatibility and reduction of assembly time and cost, in the perspective of mass-markets manufacturing.

Schematic of a Silicon Photonics circuit. Arrays of angle-polished and planar polished fibres are respectively used to couple the grating- and edge-couplers integrated on the chip. An enlarged schematic of a grating is shown at the top.